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DS1922L/DS1922T
iButton Temperature Loggers
with 8KB Data-Log Memory
Temperature Sensor Control Register Bitmap
ADDRESS
0210h
BIT 7
0
BIT 6
0
BIT 5
0
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
ETHA
BIT 0
ETLA
Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be
written to 1.
RTC Control Register Bitmap
ADDRESS
0212h
BIT 7
0
BIT 6
0
BIT 5
0
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
EHSS
BIT 0
EOSC
Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be
written to 1.
Temperature Sensor Alarm
The DS1922L/DS1922T have two Temperature Alarm
Threshold registers (address 0208h, 0209h) to store
values that determine whether a critical temperature
has been reached. A temperature alarm is generated if
the device measures an alarming temperature and the
alarm signaling is enabled. The bits ETLA and ETHA
that enable the temperature alarm are located in the
Temperature Sensor Control register. The temperature
alarm flags TLF and THF are found in the Alarm Status
register at address 0214h.
Bit 1: Enable Temperature High Alarm (ETHA). This
bit controls whether, during a mission, the temperature
high alarm flag (THF) can be set, if a temperature con-
version results in a value equal to or higher than the
value in the Temperature High Alarm Threshold register.
If ETHA is 1, temperature high alarms are enabled. If
ETHA is 0, temperature high alarms are not generated.
Bit 0: Enable Temperature Low Alarm (ETLA). This
bit controls whether, during a mission, the temperature
low alarm flag (TLF) can be set, if a temperature con-
version results in a value equal to or lower than the
value in the Temperature Low Alarm Threshold register.
If ETLA is 1, temperature low alarms are enabled. If
ETLA is 0, temperature low alarms are not generated.
Maxim Integrated
RTC Control
To minimize the power consumption of the DS1922L/
DS1922T, the RTC oscillator should be turned off when
these devices are not in use. The oscillator on/off bit is
located in the RTC Control register. This register also
includes the EHSS bit, which determines whether the
sample rate is specified in seconds or minutes.
Bit 1: Enable High-Speed Sample (EHSS). This bit
controls the speed of the sample rate counter. When set
to logic 0, the sample rate is specified in minutes. When
set to logic 1, the sample rate is specified in seconds.
Bit 0: Enable Oscillator (EOSC). This bit controls the
crystal oscillator of the RTC. When set to logic 1, the
oscillator starts. When written to logic 0, the oscillator
stops and the device is in a low-power data-retention
mode. This bit must be 1 for normal operation. A
Forced Conversion or Start Mission command automati-
cally starts the RTC by changing the EOSC bit to
logic 1.
21
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